1. Field of the Invention
This invention relates to the field of data processing. More particularly, this invention relates to data processing in systems in which a memory access request that is initiated within a processor core and is subject to a later confirm signal that indicates that the memory access request will be processed no further and whether the memory access request to the cache memory 8 will be one of (a) at least partially completed or (b) fail.
2. Description of the Prior Art
It is known to provide data processing apparatus having a processor core serving to initiate memory access requests. With the increase in speed of operation of such systems, a constraining factor has been the need to determine whether a memory access request is valid and will complete properly (e.g. will not exceed the capabilities of the system or cause some sort of system violation or abort) before that memory access request is initiated.
In order to relax the above constraint, data processing apparatus such as the ARM700 family of microprocessors (produced by Advanced RISC Machines Limited of Cambridge, Great Britain) have used a technique in which memory access requests have been initiated before the check to determine whether or not they will properly complete has produced a result with the safeguard that the result of the memory access request will not be allowed to change the state of the system until the result of the determination of whether or not the memory access request is properly completed is available. If the result of the determination indicates that the memory access request is not properly completed, then further memory access requests are delayed by stopping the processor core clock whilst other parts of the system take appropriate recovery action. The time penalty incurred by the need to undo the results of inappropriately initiating memory access requests is not too great providing the frequency of occurrence of improper completion is relatively low and so is outweighed by the ability to speed up the overall processing cycle by not having to wait for the result of the determination before initiating the operation.
It is an object of the invention to provide increased processing performance in a data processing system in which the memory access requests are subject to confirmation to indicate that a memory access request will be processed no further.